1. Field of the Invention
The present invention relates to a fabrication method of a semiconductor device. More particularly, the present invention relates to a fabrication method of a capacitor for a dynamic random access memory (DRAM) cell.
2. Description of the Related Art
According to the conventional manufacturing method of a DRAM capacitor, a first insulation layer is formed on a substrate that contains at least a transistor, followed by the formation of a first node contact plug and a bit line. A second insulation layer is further formed and is defined to form a first opening, exposing the note contact plug. A node plug is formed by filling the first opening with a conductive material. After which, a third insulation layer is formed, centering at the first opening, and is defined to form a second opening with a diameter greater than the first opening. A layer of doped polysilicon is deposited on the bottom and the sidewall of the second opening to form a bottom electrode of a capacitor. Finally, a dielectric layer and a top electrode on the bottom electrode are sequentially formed to complete the manufacturing process of a capacitor.
The node plug and the bottom electrode are conventionally formed by defining the second and the third insulation layers to form the first and the second openings, followed by a deposition of doped polysilicon. The conventional manufacturing method of a capacitor involves multiple steps and is complicated.